Ceva, the leading licensor of signal processing IP for smart, connected devices, has just announced a new processor framework for 5G, dubbed the CEVA-X2.
The processor IP will be at the heart of next-generation silicon chipsets and is designed to combine real-time controller attributes with digital signal processor (DSP) capabilities, for applications such as connectivity and Machine-Type-Communications on 5G phones and Internet of Things (IoT) devices.
It’s said to be smaller and 10% - 25% more power efficient than its predecessor, the CEVA-X4, in use cases where the emphasis is on physical layer (PHY) control processing, as will often be the case with 5G and LTE-Advanced-Pro. For example, where the PHY Datapath tasks such as per-channel measurement and decoding are not required to run on the DSP.
For this it promises a 30% - 65% better die size efficiency. It also promises strong performance even in complex use cases and is supposedly ideal to run both the PHY and MAC for a range of other communication standards.
Michael Boukaya, vice president and general manager, Wireless Business Unit at CEVA, said: "The new CEVA-X architecture framework addresses the DSP 'design gap' that exists for companies developing next-generation modems, including those targeting LTE-Advanced Pro and 5G.
“Many existing DSP architectures simply don't have the performance to tackle these advanced use cases efficiently. The CEVA-X2 brings a host of powerful features that address the key challenges for multi-RAT PHY control processing, ensuring outstanding performance and power efficiency for even the most complex use cases."
Useful reading: What is LTE-Advanced Pro?
